Two-dimensional associative memory system



April 2, 1968 B. A. CRANE ET AL 3,376,555

10 Sheets-Sheet 2 TWO-DIMENSIONAL ASSOCIATIVE MEMORY SYSTEM N CD m L)Ill" 0 April 2, 1968 A CRANE ET AL 3,376,555

TWO DIMENSIONAL ASSOCIATLVE MEMORY SYSTEM Filed June 18, 1965 10Sheets-Sheet 5 April 2, 1968 R N ET AL 3,376,555

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TWO-DIMENSIONAL ASSOCIATIVE MEMORY SYSTEM Filed June 18, 1965 10Sheets-Sheet c;

April 2, 1968 B A. CRANE ET AL 3,376,555

TWO-DIMENSIONAL ASSOCIATIVE MEMORY SYSTEM Filed June 18, 1965 10Sheets-Sheet April 2, 1968 B. A. CRANE ET AL 3,376,555

TWODIMENSIONAL ASSOCIATIVE MEMORY SYSTEM 10 Sheets-Shae:I a

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TWO-DIMENSIONAL ASSOCIATIVE MEMORY SYSTEM Filed June 18, 1965 10Sheets-Sheet a April 2, 1968 B. A. CRANE ET L 3,376,555

TWODIMENSIONAL ASSOCIATIVE MEMORY SYSTEM Filed June 181-1965 10Sheets-Sheet 10 x CD United States Patent 3,376,555 TWO-DIMENSIONALASSOCIATIVE MEMORY SYSTEM Bently A. Crane, Parsippany, and John A.Githens, Morris Township, Morris County, N.J., assignors to BellTelephone Laboratories, Incorporated, New

York, N.Y., a corporation of New York Continuation-impart of applicationSer. N 395,161, Sept. 9, 1964. This application June 18, 1965, Ser. No.465,088

27 Claims. (Cl. 340-1725) ABSTRACT OF THE DISCLOSURE An associativememory system comprising a first and second array of storage cells, eachcell in turn comprising a plurality of storage registers. Each cell inthe first array shares a storage register with a particular cell in thesecond array to thereby enable transference of information between thetwo arrays. Operations may be performed on the cells in either array inaccordance with the condition of cells in the other array.

This invention relates to information storage and retrieval systems, andmore particularly to such systems in which retrieval is based on contentrather than location. The application is a continuation-in-part ofapplication Ser. No. 395,161, filed Sept. 9, 1964.

Most memory units in present day use are of the direct access type. Eachmemory location is identified by a respective address, and data iswritten into or read out of a particular location by specifying therespective address. In an associative memory, however, each memorylocation is not provided with a respective address. Instead, eachlocation includes information and retrieval data. Often the two types ofdata are indistinguishable and the length of each type is variable. Tooperate on any given cell or memory location retrieval information maybe applied to all cells simultaneously. A particular cell may beidentified if its stored retrieval data matches the applied retrievalinformation. If necessary the information data stored in the cell may beread out once the cell is identified. Similarly, if information data isto be written into the cell, the data may be applied to all cells butthe only cell in which the information data is written may be that inwhich a match of the applied retrieval information and the storedretrieval data takes place.

In our above-identified copending application an improved cell for anassociative memory is described. A two-dimensional (X and Y) array ofmemory cells is also shown. The primary advantage of the two-dimensionalarray is that it affords very powerful bulk data processing properties.The individual cells are capable of performing logical operations, andin large arrays hundreds and even thousands of arithmetic operations maytake place simultaneously. A particular example described in theabove-identified copending application is matrix multiplication. In thetwo-dimensional associative memory of our invention two matrices may bemultiplied in only a fraction of the time required to do the same thingon even the fastest and most sophisticated of present-day computers. Thepresent invention is directed to the detailed organization of thetwo-dimensional associative memory array shown in our copendingapplication, and also includes certain additional features which provideeven more powerful bulk processing properties.

It is an object of this invention to improve the operation of anassociative type memory and more particular- 1y to improve the speed andflexibility of a twodimensional associative memory.

The basic cell utilized in the illustrative embodiment of our inventionis very similar to that shown in our copending application. Each cellincludes data storage and control registers. Each cell is capable ofcommunicating with the adjacent cells, and in accordance with datastored in the data registers of a cell the respective control registersgovern logical operations in the same cell or in an adjacent cell. Thethree fundamental operations performed by each cell are reading, writingand comparing. Data applied to each cell may be compared with datastored in the cell. In accordance with the results of the comparisonadditional data may be written into or read out of the same cell or anadjacent cell.

The two-dimensional array consists of two interconnected sequences ofcells. Each sequence of cells is basically .a self-containedone-dimensional array but the two arrays interact in two ways. Eachgroup of cells in the X dimension is associated with one cell in the Ydimension. One of the data storage registers in each of the cells in agroup of X cells is shared by the respective Y cell. Thus informationmay be transferred between the X and Y dimensions by writing data intothese shared data registers. This type of interaction between the twodimensions is of a one dimensional nature, that is, operations may beperformed in either dimension on the shared registers. The other type ofinteraction is of a two-dimensional nature. Operations may be performedon the cells in either dimension in accordance with the condition ofcells in the other dimension. Operations may be performed on a group ofcells in the X dimension in accordance with the condition of therespective Y cell, and operations may be performed on a Y cell inaccordance with the conditions of the X cells in the associated group.

In addition to the features described in our copending application thepresent invention includes certain additional features which increasethe flexibility of the system. These features include circuits operativein only one dimension and circuits affecting the two dimensionalinteraction. These features can be best appreciated in the context ofthe detailed disclosure set forth below.

A complete understanding of this invention and the various featuresthereof may be gained from consideration of the following detaileddescription in conjunction with the drawing, in which:

FIG. 1 is a block diagram schematic of an illustrative control circuitwhich may be used to govern the operation of the illustrative embodimentof the invention;

FIGS. 2 and 3 are a symbolic perspective representation of theillustrative embodiment of the invention;

FIG. 4 shows the arrangement of FIGS. 1-3;

FIG. 5 is a schematic representation of the illustrative embodiment ofthe invention which further shows the detailed circuitry included in thefirst and last Y cells of the array;

FIGS. 6-11 are a schematic representation of the detailed circuitryincluded in a typical Y cell and associated X cells; and

FIG. 12 shows the arrangement of FIGS. 6-11.

A single Y cell with its respective group of X cells is shown in detailin FIGS. 6-11. Each X cell is shown in a respective column. There are 24X cells in all, each of which includes two control fiip fiops CA and CBand ten data flip-flops. Nine of these data flip-flops are designated Xl through X9. The tenth data flipfiop in each X cell is one of the 24Fin-flops Y1 through Y24. For example, the tenth data flip-flop in thefirst X cell is Y1 and the tenth data flip-flop in the 24th X cell isY24.

The Y cell appears in FIGS. 8 and 11. The cell includes two controlflip-flops GA and GB. The subscript k in each of the control flip-flopdesignations identifies the block of equipment shown in FIGS. 6-11 asbeing the kth in the overall array. The Y cell also includes 30 dataflip-flops Y1 through Y30. Flip-flops Y1 through Y24 are shared with theX cells, and flip-flops (25 through Y30 are unique to the Y cell. Beforeproceeding with a detailed description of the circuit operation, it willbe helpful to identify the conductors extended to and from the circuitsof FIGS. 6-11. These conductors may be considered in groups.

(1) X control conductors.This group of conductors is extended alongcable 601 from the control unit which governs the system operation toeach group of X cells. The conductors in this cable are thus extended inparallel to each X cell group. Signals on these conductors control dataoperations in the X cells. The conductors in cable 601 are extended tothe CA and CB flip-flops in the X cells. Except for the extention ofconductors EAX and TGX to the first and last X cells in each group, theother X control conductors are connected in an identical manner to Xcells 2 through 23 in all groups.

(2) F control conductors.-Cable 602 is also extended from the control toeach group of X cells. This cable contains 24 conductors Fl through F24.In each group of X cells each of these conductors is coupled to arespective one of the X cells. Since the X control conductors areconnected in an identical manner to each of the 24 X cells in a group(except for the first and last) it is desired that there be some way todirectly identify a particular X cell in each group. For this reason theF conductors are provided. Signals on conductors F1 and F2, for example,identify X cells 1 and 2 in each group and in this manner operations maybe performed in only these two cells in each group if necessary.

(3) X data inputs-This group comprises 20 conductors extended from thecontrol to the X cell data flipfiops. Conductors X and X are extended tothe X1 flip-flop in every X cell in the array. Thus in an M-cell arraywhere each Y cell contains 24 cells, conductors X and X are connected to24M flipdlops. Similar remarks apply to the other 18 X data inputs. The14 conductors extended to flip-flops X2 through X8 in each X cell arenot shown since the respective flip-flops are also omitted from thedrawing for the sake of clarity. Conductors X and X are connected toflip-flop X in each X cell for writing and comparison purposes. Finally,conductors X and X are connected to flip-flops Y1 through Y24 in each Ycell. It is to be recalled that flipfiops Y1 through Y24 are treated asthe tenth data flipflops in respective X cells when operations are beingperformed in the X cells. Consequently a pair of X data input conductorsis provided for these flip-flops.

(4) X-cell communication conductors.As will be described below,communication between adjacent X cells in any group of 24 is possible.However it is also desirable that there be some communication betweenthe X cells in one group and the X cells in another. For this reasonfour conductors are extended from each group of X cells to enablecommunication between the first cell in the group and the 24th cell inthe succeeding group, and the 24th cell in the group and the first cellin the preceding group. On FIG. 6 conductor CA is extended from the 1output of flip-flop CA in the k-l group of X cells. When this flip-flopis in the 1 state the conductor is energized and if the appropriatecontrol signals are transmitted on X control conductor TGX and X controlconductor GRX flip-flop CA on FIG. 6 may be set in the 1 state. Itshould be noted at this point that when the CA flip-flop of an X cell isin the 1 state, the cell is considered to be active. The use of theactive (and inactive) condition of cells will become apparent later. OnFIG. 9 conductor CA 1, k is extended from llip-llop CA to flip-flop CAin X-cell group k+l. If the same X control conductors TGX and GRX areenergized flipflop CA in group k-i-l may be set in the 1 state ifflipfiop CA; on FIG. 9 is in the 1 state. In a similar manner conductorCA H1 is extended from flip-flop CA in group k+l in the oppositedirection to FIG. 9. If flipfiop CA in group k+l is in the 1 state and Xcontrol conductors TGX and GLX are energized, flip-flop CA will be setin the 1 state. In a similar manner conductor CA k is extended from flipfiop CA on FIG. 6 to flipflop CA in group kl in order that the latterflip-flop be set in the 1 state if the former flip-flop is in the 1state when X control conductors TGX and GLX are energized.

(5) Y control c0nducrors.--Cable 801 on FIGS. 8 and 11 is extended fromthe control to all of the Y cells in the system. In this cable areincluded the conductors which when energized control the operations inthe various Y cells. Except for conductor DGY which is connected to gate802 all of the Y control conductors are connected either directly orthrough respective gates to control flip-flops GA and GB on FIG. 11.Similar connections are made in each of the Y cells and thus the same Ycontrol signals are sent to all of the Y cells in the array.

(6) Y data inputs.1t will be recalled that the system includes X datainputs which are connected in pairs to the ten respective dataflip-flops in each X cell. In a similar manner 60 Y data inputs areprovided, two for each of the same numbered data flip-flops in all ofthe Y cells. The 60 conductors are extended from the control along cable803, for parallel connection to all of the Y cells. Thus conductors Yand Y are coupled to flip-flop Y1 in each of the Y cells, and signals on1 this pair of conductors control the writing and comparing operationsin the M Y1 flip-flops. Conductor pair Y and T are coupled to the Y2flip-flop in each of the Y cells, etc. It is to be noted that each ofthe data flip-flops in a Y cell may be written into in accordance withsignals on the conductor pair X X and in accordance with signals on arespective one of the Y, Y pairs.

(7) Y output conductors-Data in the illustrative embodiment of theinvention may not be read out of the flip-flops X1 through X9 in the Xcells. Data may be read out of only the Y data flip-flops Y1 through Y30in each Y cell. The read-out is parallel in that any one of the thirty Oconductors is high in potential if the respective flip-flop in any oneof the cells selected for read-out is in the 1 state, and thecorresponding 6 conductor is high in potential if any one of the samefiipflops is in the 0 state. It is not possible, however, to couple the1 and 0 outputs of the flip-flops directly to the output conductorsbecause any output terminal which might be low in potential would shortthe high potential outputs. For this reason isolating gates areprovided. The output conductors O 6, through 0 U in cable 804 areextended to the kth Y cell from the immediately preceding cell. Consideroutput conductor 0 If the Y30 flip-flop in any one of Y cells 1 throughk-l is in the 1 state conductor 0 is energized. A signal is transmittedthrough OR gate 805 to conductor 0 in cable 806. Cable 806 is extendedto FIG. 11 where it is once again designated 804. Thus conductor 0 isextended to the succeeding stage where it is similarly connected. If oneof the preceding Y30 flip-flops is not in the 1 state and flip-flop Y3!)on FIG. 8 is in the 1 state, and if the second input of gate 206 isenergized, a signal is transmitted through this gate and OR gate 805 toconductor 0 Once the conductor is energized the signal is transmittedthrough all of the succeeding stages to the final output circuit. At theend of the array the energization of conductor 0 is an indication thatat least in one of the selected Y cells (cell It is selected if thesecond input to gate 806 is energized) flip-flop Y30 is in the 1 state.Conductor 6 is provided with a similar connection through cell It exceptthat gate 807 controls the energization of the conductor if flip-flopY30 is in the state with its 0 output high in potential. All of theremaining 29 flip-flops in each of the Y cells is similarly providedwith a pair of output conductors. Functionally speaking the outputterminals of the same numbered flip-flops are connected in parallel butfor purposes of isolation the OR gates such as 805 and 808 are required.

In addition to the 30 pairs of output conductors the system alsoincludes output conductor O This conductor enters the kth stage and atthe right end of FIG. 11 is extended to OR gate 1101. If the 0 conductoris energized in one of the preceding cells a signal is transmittedthrough OR gate 1101 to the next cell. On the other hand, if conductor Oentering the cell is not encrgized but the 1 output of flip-flop GB ishigh in potential, OR gate 1101 again controls the energization ofconductor O leaving the kth stage. Thus at the end of the array the 0conductor is energized if in any one of the Y cells in the array therespective GB fiip-flop is in the 1 state.

(8) Conductor pairs X i through X BT -These conductors are of a hybridnature. Each has an X in its designation because they control operationsin the X cells in any group. But they are connected to respectiveflip-flops Y through Y in the Y cells because it is the data in theseflip-flops which actually determine whether the specified X celloperations are performed. Conductor pair X X is associated withflip-flop Y25. Similar remarks apply to the eight conductors associatedwith flip-flops Y26 through Y29 (not shown), and conductors X and Xwhich are associated with flip-flop Y30. The 12 conductors are extendedfrom the control to each of the Y cells in parallel along cable 803, thesame cable which contains the Y data input conductors. One of the mostpowerful properties of the two-dimensional associative memory array ofour invention is that operations may be performed in the X cells in anygroup depending upon whether certain data is contained in the dataflip-flops in the respective Y cell. In the illustrative embodiment ofthe invention flip-flops Y25 through Y30 are used for this purpose. Itis not necessary to examine all six of the flip-flops to determinewhether an X cell command should be executed in the respective group ofX cells. The control determines which of the flip-flops Y25 through Y30in each Y cell should be examined to determine whether or not the X celloperation should be executed in the respective group of X cells. Inaccordance with the selection the six pairs of conductors X X through XX are appropriately pulsed. The pulsing of these conductors not onlydetermines which of the Hipfiops Y25 through Y30 in each Y cell shouldbe considered, but in addition the particular bit values which mustappear in these selected flip-flops in order for the operation to beperformed in the respective group of X cells.

(9) Y-cell communication c0nduct0rs.This group of conductors allowscommunication between adjacent Y cells in the array. Conductor GB onFIG. 11 is extended to Y cell k+1 and is energized if flip-flop GB is inthe 1 state. In a similar manner conductor GB is extended from Y cell k1to cell k. This conductor is high in potential if flip-flop GB in cellk-l is in the 1 state and controls the same operation in cell k which iscontrolled by the energization of conductor GB in cell k+1. If conductorGB is energized and Y control conductor GRY is pulsed both inputs togate 1102 are energized and a signal is transmitted through OR gate 1103to set flipflop GA in the 1 state. In a similar manner if flip-flop GBis in the 1 state and conductor GRY is pulsed flipfiop GA in cell k+1 isset in the 1 state. Conductor GB in addition to being extended to cellk+1 is also extended to cell k-l. The energization of this conductorcontrols in cell k1 the same operation controlled in cell k by theenergization of conductor GB This latter conductor is high in potentialif flip-flop GB in cell k+1 is in the 1 state. In such a case, and ifcontrol conductor GLY is pulsed both inputs to gate 1104 are energizedand a pulse is transmitted through OR gate 1103 to set fiipflop GA inthe 1 state. In a similar manner, if flip-flop GB is in the 1 state andconductor GLY is pulsed the GA fiip-flop in cell k] is set in the 1state. There is yet a third conductor extended between adjacent Y cells.Conductor P may be energized in cell k1 and as will be described belowdetermines the setting of flip-flops GA and GB In a similar mannerconductor P may be energized in cell k to control the setting offlip-flops GA and GB in cell k+1.

Having distinguished between the nine types of signals transmitted toand from each group of X cells and the respective Y cell, attention mustnow be directed to the particular operations performed in the circuit ofFIGS. 611. Since all of the X cells except for cells 1 and 24 in eachgroup are essentially the same, the operations in the X dimension may bebest understood by considering a single cell, cell 2. Flip-flop CB maybe reset if the control applies a resetting pulse to conductor RBX.There is no way however for flip-flop CB to be set directly. Theflip-flop is set only when the three inputs to gate 901 are energized.One of these inputs is connected to the output of OR gate 902. If theflip-flop CA; is in the 1 state one input to OR gate 902 is energizedand the rightmost input of gate 901 is high in potential. On the otherhand, if control conductor DAX is pulsed OR gate 902 operatesindependent of the state of flip-flop CA Thus if it is desired tocontrol the setting of flip-flop CB independent of the state offlip-flop CA conductor DAX is pulsed. If flip-flop CB is to be set onlyif flip-flop CA is in the 1 state conductor DAX is not pulsed.

The second input to gate 901 is conductor F2. If this conductor ispulsed by the control, gate 901 may operate to set flip-flop CB On theother hand, if conductor F2 is not pulsed flip-flop CB may not be seteven if the other two inputs to gate 901 are energized. Thus it isapparent that flip-flop CB may be prevented from being set if conductorF2 is not pulsed. It will be recalled that signals transmitted alongconductors F1 through F24 enable individual X cells or subgroups of Xcells within a group of 24 X cells to be isolated. Since the setting offlip-flop CB can be used to control subsequent operations in cell 2 itis seen that the signals transmitted along the F conductors provide thenecessary isolation.

The third input to gate 901 is the output of OR gate 903. The operationof this OR gate depends upon the matching of the contents of flip-flopsX1 through X9 and Y2 with data signals applied to the ten pairs ofconductors X X through X X Data applied to these ten pairs of conductorscontrol two operations. The data may be used for writing bit values intothe ten flip-flops in each X cell. On the other hand, the data on theseten pairs of conductors may be compared with the data contained in theten flip-flops in the X cell to obtain a match or a mismatch indication.Consider flip-flop X1 in cell 2. Suppose the bit value applied toconductor pair X X is a 1. In this case conductor X is high in potentialand conductor X is low in potential. Thus one input of gate 1002 is highin potential and one input of gate 1003 is low in potential. Ifflip-flop X1 is in the 1 state the 0 output is low in potential and the1 output is high in potential. Thus the second input of gate 1002 is lowin potential and the second input of gate 1003 is high in potential.Since one input of each of the two gates is low in potential neithergate operates. On the other hand, if flip-flop X1 is in the 0 state, thesecond input of gate 1002 is high in potential and the second input ofgate 1003 is low in potential. In this case gate 1002 operates toenergize OR gate 1001. The resulting pulse on conductor 104 is anindication that at least one flip-flop in the X cell contains a bitvalue which does not match the bit value represented by the signal onthe respective pair of conductors X X through X X If the system doesntcare about the content of flip-flop X1 neither conductor X nor conductorX is pulsed. In such a case neither of gates 1002 and 1003 operates andOR gate 1001 cannot operate as a result of the contents of flipflop X1.The OR gate can of course operate if one of the other nine flip-flops incell 2 contains a bit which does not match the bit value applied to therespective pair of conductors X X (not shown) through X X It should benoted that a similar connection is provided for flip-flop Y2. The X andX signals are transmitted to respective gates 1105 and 1106. The 1 and 0outputs of flip-flop Y2 are also extended to respective ones of thesegates and the outputs of the two gates are extended to OR gate 1001. Asa particular example of i the match operation assume that signalsrepresenting a 0 are applied to conductor pair X X and signalsrepresenting a 1 are applied to conductor pair X X The other eight pairsof conductors are not pulsed since the match operation is independent ofthe contents of flipflops X2 through X9 in all of the X cells. Ifflip-flop X1 in cell 2 contains a 0 and flip-flop Y2 in cell 2 containsa 1 none of the inputs to OR gate 1001 are energized and conductor 1004is low in potential to indicate a match. On the other hand if fiip-fiopX1 contains a 1 and/or flip-flop Y2 contains a 0 conductor 1004 is highin potential to indicate a mismatch.

Inverter 906 inverts the signal on conductor 1004. Thus if conductor1004 is high in potential one input to gate 904 is high in potential andone input to gate 905 is low in potential. On the other hand, ifconductor 1004 is low in potential one input to gate 904 is low inpotential and one input to gate 905 is high in potential. During thematch operation one of conductors GMX and GMX is pulsed. Conductor GMXis energized if the CB flip-flops in the X cells are to be set as aresult of a match condition. If the contents of flip-flops X1 through X9and Y2 in cell 2 match the data applied to selected pairs of conductorsX X through X X conductor 1004 is low in potential and one input to gate905 is high in potential. With the energization of conductor GMX thesecond input of gate 905 is energized, the gate operates and a pulse istransmitted through OR gate 903 to the last input of gate 901. In such acase, provided the other two inputs to gate 901 are energized, flip-flopCB is set. On the other hand, if the CB flip-flops in the X cells are toset only if the applied data does not match the data contained in therespective X cell flip-flops conductor GHX is energized. In this caseonly gate 904 can operate. This gate operates if conductor 1004 is highin potential, i.e., a mismatch of the applied data and the contents ofcell 2 exists. When gate 904 operates a signal is transmitted through ORgate 903 to the third input of gate 901.

Thus there are a variety of factors which control the setting offlip-flop CB If desired flip-flop CB may be set only if flip-flop CA isin the 1 state. On the other hand, if conductor DAX is pulsed thesetting of flip-flop CB is independent of the state of flip-flop CA Thesetting of flip-flop CB is also directly dependent upon the pulsing ofconductor F2. Finallly, by pulsing one of conductors GMX and Gl\ IX thesetting of flip-flop CB may be controlled in accordance with a match ormismatch of the contents of cell 2 with the data signals applied toconductor pairs X X through X X As described above the data signalsapplied to the ten pairs of conductors X X through X X may be used foreither comparison or writing purposes. Suppose it is desired to set theX1 flipfiops in the 1 state. Conductor X is pulsed and conductor lil Xis left low in potential. In this case one input to gate 1006 is high inpotential and gate 1005 is inhibited from operating. If the other inputto gate 1006, conductor 1007, is high in potential the gate operates andflip-flop X1 is set in the 1 state. One the other hand, to Write a 0 inflipfiop X1 conductor X is pulsed rather than conductor X In this casegate 1006 is inhibited from operating but gate 1005 operates ifconductor 1007 is high in potential. Similar remarks apply to the othernine flip-flops in cell 2. it will be noted that the two inputs toflip-flop Y2 come from OR gates 1107 and 1108. These OR gates arerequired since flip-flop Y2 may be written into in accordance with Xdata signals or Y data signals. In the case of X data signals gate 1009or 1010 operates to set flip-flop Y2 in the desired state. Again, one ofthese gates can operate only if conductor 1007 is high in potential.

Conductor 1007 is high in potential only if gate 908 operates. When itis desired to write X data in a cell, conductor STX is pulsed toenergize one input of gate 908. During a match operation this conductoris not pulsed and the data signals on the ten pairs of conductors X Xthrough X X do not control the writing of data in the X cell flip-flops.Conductor STX is energized only when data is to be written in the Xcells. The second input to gate 908 can be energized in one of two ways.If data is to be written in only active cells, which, as noted earlier,are defined as cells in which the respective CA flip-flops are in the 1state, conductor DAX is not pulsed. OR gate 902 operates to energize thesecond input to gate 908 only if flip-flop CA is in the 1 state. On theother hand, if a cell is to be written into independent of its activitycondition conductor DAX is pulsed to operate OR gate 902 whether or notflip-flop CA is in the 1 state. OR gate 902 controls both the writingand comparison operations since the output of this gate is one of theinputs to both gates 908 and 901. Thus both writing and comparisonoperations may be made dependent upon the activity condition of cell 2(represented by the state of flip-flop CA or may be made independent ofthis condition if conductor DAX is pulsed.

Following a match operation some of the CB flip-flops in the X cells arein the 1 state. If a CB flip-flop is in the 1 state it is possible toset the CA flip-flop in the same cell in the 1 state. It is alsopossible to set the CA flip-flop in either adjacent cell in the 1 state.Suppose flip-flop CB is in the 1 state and conductor GDX is pulsed. Inthis case both inputs to gate 910 are energized and this gate operatesto transmit a pulse through OR gate 911 to set flipflop CA If conductorGDX is not pulsed and instead conductor GRX is energized, gate 912operates to transmit a pulse through OR gate 913 to set flip-flop CA inthe 1 state. In this manner a CA fiip'flop may be set in the I state ifthe CB flip-flop in the adjacent cell to the left is in the 1 state. Ina similar manner if conductor GLX is pulsed a CA flip-flop may be set inthe 1 state if the CB flip-flop in the cell to its right is in the 1state. Suppose flip-flop CB is cell 1 is in the 1 state and conductorGLX is pulsed. In this case both inputs to gate 915 are energized and apulse is transmitted through OR gate 911 to set flip-flop CA in the 1state. Thus following a successful match or mismatch in a cell, the samecell or either adjacent cell may be activated.

The above description completely defines the operation of cells 2through 23 in each group of X cells. Each of the end cells, 1 and 24,operates in a similar manner except that each of these cells is providedwith two additional inputs, EAX and TGX, and additional circuitry. Asdescribed above the energization of conductor GLX or GRX enables a cellto be made active if. the CB flip-flop in either adjacent cell is in the1 state. Flip-flop CA may be set in the 1 state if conductor GRX ispulsed and flipfiop CB is in the 1 state. Very often however it may bedesirable to set flip-fiop CA in the 1 state if flip-flop CB in the samecell group is in the 1 state. This, in functional terms, is anend-around shift." To accomplish this endaround shift conductors EAX andGLX are pulsed. If flip-flop CB is in the 1 state a signal istransmitted along conductor 611 to one input of gate 916. When conductorEAX is energized gate 916 operates to transmit a pulse through OR gate917 to one input of gate 919. With the energization of conductor GLXgate 919 operates to transmit a pulse through OR gate 913 to setflip-flop CA in the 1 state. On the other hand, suppose it is desired toset flip-flop CA in the 1 state if flip-flop CB is in the 1 state, anend-around shift in the opposite direction. In this case conductor EAXis energized once again but this time conductor GRX is pulsed ratherthan conductor GLX. With flip-flop CB in the 1 state conductor 920 ishigh in potential and one input of gate 612 is energized. When conductorEAX is pulsed, gate 612 operates to transmit a signal through OR gate614 to one input of gate 616. With conductor GRX pulsed the other inputto this gate is energized and gate 616 transmits a pulse through OR gate609 to set flip-flop CA in the 1 state.

It will be noted that thus far the operations performed in each group ofX cells have been described to be independent of the operationsperformed in other groups of X cells. In executing some programs howeverit may be desirable to control the setting of flip-flop CA in accordancewith operations performed in the adjacent group of cells to the rightand it may be desirable to set flip-flop CA in the 1 state in accordancewith operations performed in the adjacent group of X cells to the left.For this reason circuitry is provided to set flip-flop CA; in the 1state if flip-flop CA in the adjacent group of cells to the right is inthe 1 state. Conductor CA 1H1 is connected to the 1 output of flip-flopCA in the adjacent group of X cells 1 to the right. If this conductor ishigh in potential and conductor GLX is pulsed together with conductorTGX (rather than conductor EAX), flip-flop CA will be set in the 1state. With the pulsing of conductor TGX gate 918 operates to transmit apulse through OR gate 917 to one input of gate 919. With conductor GLXenergized this gate operates to transmit a pulse through OR gate 913 toset flip-flop CA Flip-flop CA may be set in the 1 state if flip-flop CAin the adjacent group of cells to the left is in the 1 state. In thiscase conductor TGX is energized together with conductor GRX. rather thanconductor GLX. Conductor CA is connected to the 1 output of flip-flopCA; in the adjacent group of cells to the left. If this flip-fiop is inthe I state the conductor is high in potential and when conductor TGX ispulsed gate 613 operates to transmit a pulse through OR gate 614 to oneinput of gate 616. When conductor GRX is pulsed the other input of gate616 is energized and a pulse is transmitted through OR gate 609 to setflip-flop CA in the 1 state. In a similar manner the state of flipflopCA on FIG. 9 may control the setting in the 1 state of flip-flop CA inthe adjacent group of cells to the right. Conductor CA k is connected tothe 1 output of fiipdlop CA; and is extended to the adjacent group ofcells on the right. If conductor TGX is pulsed together with conductorGRX and flip-flop CA is in the 1 state flip-flop CA in X cell k-l-l willbe set in the I state. Similarly, the state of flip-flop CA may controlthe setting of flip-flop CA; in the first X cell in group k1. ConductorCA k is connected to the 1 output of flipfiop CA and is extended to theadjacent X cell on the left. If flip-flop CA is in the 1 state andconductor TGX is pulsed together with conductor GLX flip tlop CA in Xcell group k1 will be set in the 1 state.

The operations described above which are performed in any group of Xcells are essentially independent of the operations performed in therespective Y cell. There is one exception to this general statement. Itwill be noted that conductor 812 is connected to one input of OR gate1001, and a similar connection is provided in each of the other 23 Xcells in the same group. Conductor 812 is either energized orde-energized in accordance with certain data contained in the Y cell ofFIGS. 8 and 11, as will be described below. The signal on conductor 812is treated just as is the signal from a gate such as 1002 and 1003. Ifconductor 812 is low in potential it has no effect on the operationperformed in the X cells. If the conductor is high in potential howeverconductor 1004 and the equivalent conductor in the other X cells arehigh in potential. Thus if conductor 812 is high in potential amismatch" condition is indicated in each of the X cells. The mismatchcondition on conductor 1004 is used to control the setting of the CBflip-flops. Thus in accordance with the data contained in the Y cell,and the potential of conductor 812, operations may be controlled in allof the X cells in the respective group. The signal on conductor 812 andthe equivalent conductors in the other Y cells may be used to identifyparticular groups of X cells. For example, suppose it is desired to setthe CB flip-flop in each cell in any group of 24 X cells only if certaindata is contained in the respective Y cell. Suppose further that thisdata results in a pulse on conductor 812. In this case no signals areapplied to the ten pairs of conductors X X through X X and in only somegroups of X cells the 24 conductors equivalent to conductor 1004 will beenergized. If conductor GTIX is also energized one input to each of thegates equivalent to gate 901 in each of the cells in these groups isenergized. If the other two inputs to each of these gates are energizedthe respective CB flip-flops are set in the 1 state. Further isolationis possible by pulsing only selected ones of conductors Fl through P24,in which case only selected ones of the CB flip-flops will be set inthose groups of X cells in which the conductor equivalent to conductor812 in the respective Y cells are energized.

In this manner operations performed in the X cells may be controlled inaccordance with data contained in the respective Y cells. As will bedescribed below the operation of the Y cell of FIGS. 8 and 11 isessentially independent of the data contained in the respective group ofX cells. However there is one way in the illustrative embodiment of theinvention in which the operation of a Y cell may be controlled inaccordance with the states of the respective X cells. OR gate 930 onFIG. 9 is provided with 24 inputs. Each one of these inputs is connectedto the 1 output of a respective one of the CA flip-flops in the group.Thus conductor 931 is high in potential if at least one of the CAflip-flops in the 24 X cells is in the 1 state. As will be describedbelow the potential of conductor 931 may be used to control the settingof fliptlop GB in the 1 state. Flip-flop GB serves in a capacity similarto the 24 CB flip-flops in the 24 X cells and flipfiop GA serves in acapacity similar to the 24 CA flipflops. Just as the CB flip-flops maybe set in accordance with data contained in the Y cells and theenergization of conductor 812, flip-flop 613;; may be set in accordancewith the states of the 24 respective CA flip-flops and the energizationof conductor 931.

On FIGS. 6-11 enough X cells are shown to understand the interactionsbetween them. Only one Y cell is shown on FIGS. 8 and 11. However itmust be understood that the Y cells also form an array and interact inmuch the same manner as the X cells. If FIGS. 8 and 11 are rotatedcounterclockwise degrees the Y cell looks like an X cell. The seriesconfiguration of Y cells may be visualized by considering other Y cellsto both the right and left of the rotated cell of FIGS. 8 and 11. (Inthe rotated configuration the 24 X cells associated with each Y cellappear as horizontal projections.) The GE fiipfiop in each Y cell servesto register a match or mismatch. The GA flip-flop in each Y cellcontrols the activity condition of the cell. Thus the GB flip-flop of aY cell is equivalent to the CB flip-flop of an X cell and the GAflip-flop of a Y cell is equivalent to the CA flip-flop of an X cell. Inthe X cell array a match or mismatch indication represented in a CBflip-flop can control the activity condition in either the same cell oreither adjacent cell. The same holds true in the Y cell array. If a GBflip-flop is in the 1 state it is possible to activate the GA flip-flopin the same cell or to activate the GA flip-flop in either adjacentcell.

The read-out circuitry has already been described. Referring again toflip-flop Y30 and the associated readout circuitry on FIG. 8 it is seenthat conductor may be made high in potential if flip-flop Y30 is in the1 state or if flip-flop Y30' in one of the preceding Y cells is in the 1state. Similarly, conductor 6 can be energized if one of theseflip-flops is in the 0 state. However in order for one of these twoconductors to be energized as a result of the state of flip-flop Y30 oneof gates 806 and 807 must operate. One input to each of these gates isconnected to one of the two outputs of flip-flop Y30. The other input toeach gate is connected to conductor 813. This conductor is in turnconnected to the 1 output of flip-flop GA Thus one of conductors 0 and 6may be energized in a particular Y cell only if the cell is active. Inthe entire array of M cells assume that only 50 are active. As long asthese cells are active continuous readout signals are transmitted fromthe array. If in at least one of the 50 active cells flip-flop Y30 is inthe 1 state conductor 0 is energized. If in at least one of the 50 oneof the 50 active cells flip-flop Y30 is in the 1 state conductor 6 isenergized. Similar remarks apply to the 29 other pairs of outputconductors and flip-flops Y1 through Y29 in all of the Y cells. Theread-out is continuous and functionally speaking is parallel in naturebecause any one of the same numbered flip-flops in the active Y cellscan control the energization of the respective output conductor. If itis desired to read out the data in a particular Y cell it is necessaryto isolate this cell by making this cell the only active one in thearray. In this manner the potentials on the 30 pairs of outputconductors will be dependent solely on the respective data flipfiops inthis cell.

The match and write operations in the Y cells are almost identical tothose in the X cells. Cable 803 contains 30 pairs of input conductors Y,Y. Consider first the match operation. This operation may be bestunderstood by considering a particular flip-flop, for example, Y2. Ifthe bit value represented by Y2 is to be used in the comparison one ofconductors Y and T is energized and thus one of the inputs to one ofgates 1123 and 1124 is energized. The other input of each of these gatesis connected to the 0 or 1 output of flip-flop Y2. As in X cell one ofthese gates operates only if there is no match. If the data bit inflip-flop Y2 need not be examined during the comparison neither ofconductors Y and Y; is energized and neither of gates 1123 and 1124operates. OR gate 1116 is provided with two inputs for each of the 30data flip-flops in the Y cell. Conductor 1126 is thus high in potentialonly if a mismatch is detected. Flip-flop GB may be set on either amatch or a mismatch. On a mismatch, with conductor 1126 high inpotential, one input of gate 1128 is energized. If conductor Gil Y isenergized the gate operates and transmits a pulse through OR gate 1129to one input of gate 1130. The other input to this gate is connected tothe output of OR gate 1131. This gate operates if the Y cell is active,i.e., flip-flop GA is in the l state, or if conductor DAY is pulsed.When gate 1130 operates a pulse is transmitted through OR gate 1132 toset flip-flop GB in the 1 state. The flip-flop may also be set in the 1state following a successful match. If the applied data matches the datacontained in the selected flip-flops in the Y cell conductor 1126 is lowin potential and inverter 1133 energizes one input of gate 1134. Whenconductor GMY is pulsed gate 1134 operates to transmit a pulse throughOR gate 1129 to one input of gate 1130. Again, if either flip-flop GA;is in the 1 state or conductor DAY is pulsed OR gate 1131 energizes the12 other input of gate 1130. The pulse transmitted through OR gate 1132sets flip-flop GB, in the 1 state. The sequence of setting flip-flop GBin the 1 state is identical to that for setting one of the CB flip-flopsin the 1 state.

To write data into the flip-flops in the Y cells conductor STY ispulsed. This energizes one input of gate 1140. The other input isconnected to the output of OR gate 1131. Thus gate 1140 operates whenconductor STY is pulsed if either flip-flop GA is in the 1 state or ifconductor DAY is pulsed together with conductor STY. The write operationmay be controlled independent of the activity condition of the cell ormay be made dependent upon the activity condition of the cell by notpulsing conductor DAY. When gate 1140 operates conductor 1115 isenergized. Consider again flip-flop Y2. With conductor 1115 energizedone input of each of gates 1117 and 1118 is high in potential. If datais to be written into flip-flop Y2 one of conductors Y and T is high inpotential and one of gates 1117 and 1118 operates to transmit a pulsethrough the respective one of OR gates 1107 and 1108 to set flip-flop Y2in the desired state. The write operation in a Y cell is also identicalto the write operation in an X cell. The only difference is that ORgates such as 1107 and 1108 are included in the various signal paths.These OR gates are necessary because the flip-flops in the Y cells mayhave data written into them in accordance with signals on the respectiveY, Y conductor pairs, or in accordance with signals on conductor pairs XX Flip-flop 68 may be set in the 1 state as a result of a successfulmatch or mismatch. The flip-flop may be reset directly if conductor RBYis pulsed. Similarly flip-flop GA may be reset directly if conductor RAYis pulsed. Gate 1141 is included to provide some control of the Y celloperation in accordance with data contained in the respective group of Xcells. It will be recalled that conductor 931 is high in potential ifany one of the 24 X cells in group I: is active. In such a case oneinput to gate 1141 is energized. If conductor TXY is pulsed gate 1141operates to transmit a signal through OR gate 1132 to set flipflop GBThus it it is desired to set the GB flip-flop in any Y cell if at leastone of the respective X cells is active it is only necessary to pulseconductor TXY.

If flip-flop GB is in the 1 state flip-flop GA may be set in the 1state, i.e., the cell may be made active, if conductor GDY is pulsed.With flip-flop GB in the 1 state one input to gate 1142 is energized.When conductor GDY is pulsed the gate operates to transmit a pulsethrough OR gate 1103 to set flip-flop GA It is also possible to activatethe adjacent cell on the right if flip-flop GB is in the 1 state andconductor GRY is pulsed, It will be noted that conductor GB is extendedfrom the 1 output of flip-flop GB to the Y cell on the right. In asimilar manner the Y cell to the left extends conductor GB to FIGS. 8and ll. This conductor is high in potential if the adjacent cell on theleft has its GB flip-flop in the 1 state. In such a case one input togate 1102 is energized and when conductor GRY is pulsed the gateoperates to transmit a signal through OR gate 1103 to set flip-flop GA,;in the 1 state. It is also possible to activate the adjacent cell on theleft if flip-flop GB is in the 1 state and con ductor GLY is energized.Conductor GB connected to the 1 output of fiip-fiop GB is extended tothe cell on the left. In a similar manner conductor GB which isconnected to the 1 output of flip-flop GB in the adjacent cell on theright is extended to FIG. 11 and is connected to one input of gate 1104.If flip-flop GB in cell k+l is in the 1 state and conductor GLY ispulsed gate 1104 operates to transmit a pulse through OR gate 1103 toset flip-flop GA in the 1 state. This propagation of signals betweenadjacent Y cells is identical to the propagation of signals betweenadjacent X cells.

Control conductor PRY, output conductor 0 and the P conductor extendedbetween adjacent Y cells are provided in order that a particularpropagate command be executed. Very often only one Y cell in the arraywill be active. The propagate command under consideration is essentiallythe following: Activate all cells between and including an alreadyactive cell and the first cell to its right that does not match theinput pattern, and in this first cell to the right that does not matchthe input pattern set the GB flip-flop in the 1 state. To execute thecommand conductor RBY is pulsed to reset all of the GB flip-flops. Atthis time all of the GB flip-flops are in the state, conductor O, isde-energized, and the GA flip-flop is in the 1 state in only one cell. Amatching pattern is then applied to the Y. Y conductor pairs andconductor PRY is energized. Suppose cell k is the cell in the arraywhich is active. The 1 output of flip-flop GA, is energized and with thepulsing of conductor PRY gate 1152 transmits a pulse through OR gate1151 to the P conductor. This conductor is extended to cell k-l-l. Ifthe contents of cell k match the input pattern conductor 1126 is low inpotential. Gate 1150 and gate 1128 do not operate because one of theirinputs is low. Due to the inverting action of inverter 1133 one input togate 1134 is high. However conductor GMY is not pulsed and gate 1134does not operate either. Thus flip-flop GB is not set. The net result ofthe operation in the first cell of the string under consideration isthat a signal is transmitted to the next stage over the respective Pconductor.

Consider now the operation of the second cell. Assume that the cell ofFIGS. 8 and 11 is the second cell and that the first cell in the stringis cell k1. A positive potential is transmitted on conductor P to oneinput of gate 1143. If the contents of the second cell, cell k, matchthe input pattern conductor 1126 is low in potential and inverter 1133causes a high potential to be applied to the second input of gate 1143.This gate operates and sets flipflop GA; in the 1 state through OR gate1103. At the same time that this cell is made active a signal istransmitted through OR gate 1151 to the P conductor extended to the nextstage. The GB flip-flop is not set in the 1 state because again none ofgates 1150, 1128 and 1134 operates.

This operation continues down the line. As long as the fiip-fiop contentof a cell matches the input pattern it is made active and a signal istransmitted over the respective P conductor to the succeeding stage. TheGE flip-flop remains reset in all cells which are made active. Thispropagation continues until finally a cell is reached in which the cellcontent does not match the input pattern. In this cell conductor 1126 ishigh in potential. Consequently the output of inverter 1133 is low inpotential, gate 1143 does not operate, and the cell is not activated.However, because conductor 1126 is high in potential one input of gate1150 is energized. The other input to this gate which is connected tothe P conductor fro-m the preceding cell is also high in potential.Thus, gate 1150 operates and transmits a pulse through OR gate 1130 toset flip-flop GB Since flip-flop GA. is not set conductor P is notenergized and the propagation of signals ceases. The cell at the end ofthe string is the only one with its GB flip-flop in the 1 state. OR gate1101 operates and conductor O is energized. The energization of thisconductor notifies the control that the propagation sequence is over.Until the end cell in the string finally has its GB flip-flop set in the1 state conductor O is low in potential. At the end of the sequence theconductor is energized. The reason for providing conductor O is thefollowing. The control may not know at the beginning of the sequence howlong a time is required for the string of cells to be activated sincethe control may not be aware of the data patterns stored in the cells.By providing conductor O the control is notified when the propagationhas terminated and may proceed to control the execution of other orders.It should be noted that during the propagation conductor PRY does nothave to be continuously energized. This conductor is energized initiallyin order that the GA flip-flop in the first cell in the string operateits gate 1152 to transmit a pulse through gate 1151 to its P conductor.In the succeeding cells however the gates equivalent to gate 1143operate. Since the output of gate 1143 is an input of OR gate 1151 inthe succeeding cells the OR gates operate even in the absence of theenergization of conductor PRY. Thus, conductor PRY must be energizedonly for a brief instant at the beginning of the sequence. From afunctional point of view the connection of the output of gate 1143 toone of the inputs of gate 1151 is not required if conductor PRY remainsenergized throughout the time interval of propagation. Since theoperation of gate 1143 controls the setting of flip-flop GA,;, and ifconductor PRY is energized gate 1152 controls the pulsing of conductor Pthe direct connection from gate 1143 to OR gate 1151 is not required.However, were this connection not included conductor P would not bepulsed until after flip-flop GA is set. By providing the directconnection from gate 1143 to OR gate 1151 the flip-flop is by-passed andthe activation of the string of cells is faster.

It will be recalled that conductor 812 is energized in accordance withdata contained in the Y cell, and since conductor 812 is one input toeach of the OR gates such as 1001 in the 24 X cells the energization ofthis conductor controls X cell operations. Cable 803 contains the 30 Y,Y conductor pairs. The cable also contains six X, X conductor pairs.Conductor pairs X i through X X are associated with respectiveflip-flops Y25 through Y30. Each flip-flop is provided with a pair ofgates such as 830 and 831 and the outputs of these gates feed into ORgate 820. The operation of OR gate 820 is similar to the operation ofthe X and Y cell OR gates involved in the match operations, namely the24 X cell OR gates such as 1004 and the Y cell OR gate 1116. Conductor812 is high in potential if the data contained in flip-flops Y25 throughY30 does not match the data signals applied on the six conductor pairs Xi through X X OR gate 820 is also provided with an additional input,this input being connected to the output of gate 802. One input of gate802 is conductor 813 which is connected to the 1 output of fiipfiop GAThe other input to gate 802 is control conductor DGY. It When controlconductor DGY is pulsed cell It is active, gate 802 opcrates andconductor 812 is high in potential. Even without an applied inputpattern on the six input conductor pairs X X through X X by pulsingconductor DGY the only OR gates such as 1001 which may operate in the Xcells are those contained in groups whose respective Y cells are active.Thus while the X cell control of Y cell operations is relatively simplein that the GB flip-flop in any cell may be set in the 1 state if anyone of the 24 associated X cells is active, the Y cell control of theoperations in the respective group of X cells is more complex. First,the control is not direct. Even if conductor 812 is energized the effectin the X cells depends upon the particular operation being performed,e.g., whether control conductor GMX or GMX is pulsed. Second, conductor812 may be energized not only if the respective Y cell is active, but inaddition in accordance with the matching of the contents of selectedones of flip-flops Y25 through Y30 with applied data signals.

In the illustrative embodiment of the invention each of cells 1 throughM is identical to the cell shown in FIGS. 6-11. The only exception iscell 1 in which there is a minor change. It will be noted that theoutput conductors O 6 through O O enter each cell via cable 804. Eachoutput conductor is one input of a respective OR gate such as 805, theother input to the gate being connected to the output of a gate such as806. The output conductors originate in cell 1 and for this reason incell 1 the output conductors do not enter the cell. Thus, the OR gatessuch as 1121, 1122, 805 and 808 may be omitted in cell 1.

In the illustrative embodiment of the invention each group of 24 X cellsis identical to that shown on FIGS.

6ll. The only exceptions are groups 1 and M. X cell 24 in group 1 has nocell preceding it. Consequently, there is no need to extend a conductorfrom the 1 output of flip-flop CA to the preceding stage. Similarlythere is no conductor from cell 1 in the preceding cell which isextended to cell 24 in the first group. Thus if FIGS. 6-11 represent thefirst group of cells, conductors CA k and CA can be omitted in thisgroup. Since conductor CA is omitted, gate 613 and OR gate 614 can beomitted from the circuit and the output of gate 612 can be connecteddirectly to one input of gate 616. Similarly the CA conductor enteringand the CA conductor leaving cell 1 in group M can be omitted sincethere is no group succeeding group M. In such a case gate 918 and ORgate 917 may be omitted from the circuit and the output of gate 916 maybe connected directly to one input of gate 919. Other variations arepossible with regard to the first and last X cells in the entire array.For example, it may be desired to provide end-around shifts in the Xdimension. In such a case conductor CA M may be connected to the CAconductor which is connected to gate 613 in cell 24 in the first group,and conductor CA 1 may be connected directly to the CA conductorconnected to gate 918 in cell 1 in group M.

It is to be recalled that each Y cell is individually connected to thetwo adjacent cells. The same holds true of cells 1 and M. However, sincethese cells are the first and last in the M-cell array additionalcircuitry is required for the individual connections to cell 1 and stillmore circuitry is required for the individual connections to cell M.This circuitry is shown on FIG. 5. To the left of cell 1 is cell and tothe right of cell M is cell M+1. Cell 0 and cell M-l-l are not truecells. These cells include only GA and GB flip-flops. They do notinclude the 30 Y flip-flops to be found in each of the other cells nordo they include 24 X cells. Cells 0 and M-l-l are provided in order thatcell 1 and cell M be no different from the other cells in the array,i.e., in order that cell 1 receive the usual input signals and that cellM produce the usual output signals. FIG. 5 will also be helpful inunderstanding the overall organization of the illustrative embodiment ofour invention.

Cells 1 through M are shown merely in block diagram form. Cell 0 is tothe left of cell 1 and cell M-l-l is to the right of cell M. All controlfunctions are determined by control 500. The Y control cable 801 passesthrough not only cells 1 through M but also through cells 0 and M+1. Thesame is not true however of the X control cable 601. Since cells 0 andM+1 do not contain X cells cable 601 is provided with connections toonly cells 1 through M. Similar remarks apply to cable 602 which whichcontains conductors F1-F24, and the X signal data inputs X Y through X XCable 803 contains the 30 conductor pairs Y Y through Y T and the sixconductor pairs X i through X X The former group of conductors controlmatch and write operations in the Y cells and the latter group ofconductors control X cell operations in accordance with data containedin flip-flops Y through Y in the Y cells. Since cells 0 and M+1 do notinclude flip-flops Y1 through Y30 cable 803 is extended to only cells 1through M. Similarly cable 804 contains the 30 pairs of conductors O 6through O 6 on which the output signals are developed. These signals aredeveloped in cells 1 through M (from left to right) and are extendedback to control 500. Conductor O originates in cell 0 and is one of theinputs to cell 1. The same conductor is an output from cell M and isextended to cell M l-1. The output conductor O, from cell M+1 isextended to control 500. Thus conductor O can be energized not only incells 1 through M but in addition in either of cells 0 or M-l-l.

It will be noted that while cable 801 contains all of the Y controlconductors shown on FIGS. 8 and 11, not all of these conductors areextended to cells 0 and M+1.

iii

This is to be expected since fewer operations can be performed in cells0 and M+1 than in cells 1 through M. Conductor SEY shown on FIG. 5 isalso a Y control conductor. However this conductor is extended to onlycells 0 and M-I-l and for this reason is not included in cable 801 sincethe signal on this control conductor is not required by cells 1 throughM.

Consider first cell 0. This cell is provided with flip-flops GA and GBThe 1 output of flip-flop GB is extended to the next cell, cell 1, justas the 1 output of flip-flop GB on FIG. 11 is extended to the adjacentcell on the right. The 1 output of flip-flop GB is also connected toconductor O which is extended to cell 1. It will be noted that on FIG.11 the 1 output of flip-flop GB is connected to an input of OR gate1101, the output of this OR gate being extended to the next stage andthe other input of the OR gate being the 0 conductor from the previousstage. Since the 0 conductor originates in cell 0 there is no need foran OR gate such as 1101.

Flip-flop GB can be reset in the ordinary manner with the pulsing ofconductor RBY. However the setting of the flip-flop is slightlydifferent from the setting of the GB flip-flop in each of cells 1through M. The setting pulse for flip-flop GB on FIG. 11 is derived fromOR gate 1132. This OR gate has three inputs, the outputs of gates 1141,1150 and 1130. The former two gates are operated in accordance with datain the X cells or the Y cells. Since there is no such data in cell 0these two gates are not required. The only gate which is required isgate 530 which is equivalent to gate 1130. Since the setting pulse forflip-flop GB can be derived from only one gate, gate 530, there is noneed for an OR gate equivalent to OR gate 1132. One input to gate 530 isderived from OR gate 531 which is equivalent to OR gate 1131. The twoinputs to this OR gate are the DAY conductor and the output of therespective GA flip-flop. The other input to gate 530 is the output of ORgate 529. This OR gate is equivalent to OR gate 1129 on FIG. 11. OR gate1129 has two inputs. One of gates 1128- and 1134 operates depending onthe pulsing of one of conductors GMY and GMY and the operation of ORgate 1116. In cell 0 there is no OR gate equivalent to OR gate 1116 andfor this reason conductors GMY and G.\ IY are connected directly to thetwo inputs of OR gate 529. The pulsing of either of these conductorsenergizes one input of gate 530. Flip-flop GB is set in the 1 state ifat the same time conductor DAY is pulsed or flip-flop GA is in the 1state. Gate 552 is equivalent to gate 1152 on FIG. 11. One input to thisgate is the 1 output of the respective GA flip-flop and the other inputto the gate is the PRY conductor. The output of gate 552 is connected toconductor P which is extended to cell 1. On FIG. 11 OR gate 1151 isprovided since signal P can be derived from either gate 1152 or gate1143. Gate 1143 is energized only if a P signal is received from thepreceding cell. Since there is no cell before cell 0, FIG. 5 does notinclude a gate equivalent to gate 1143 and for this reason there is noneed for an OR gate equivalent to OR gate 1151. Thus the output of gate552 is connected directly to conductor P OR gate 503 and gates 502, 504and 542 are equivalent to the four respective gates on FIG. 11. Gate 504operates to set flip-flop GA if conductor GB extended from cell 1 tocell 0, is energized when conductor GLY is pulsed. Gate 542 operates toset flip-flop GA if when conductor GDY is pulsed flip-flop GB is in the1 state. Gate 1102 on FIG. 11 operates if a GB signal is received fromthe preceding cell When conductor GRY is pulsed. There is no cell beforecell 0 and for this reason conductor SEY is provided. This conductor isconnected to one input of gate 502. If this conductor is pulsed togetherwith conductor GRY gate 502 operates to set flip-flop GA in the 1 state.These two conductors may be pulsed together 17 whenever it is desired toactivate the leftmost cell in the entire array.

Cell M+1 is very similar to cell 0. Conductor GB is extended from cell Mto cell M+1 and is one input to gate 555. The other input to this gateis conductor GRY and thus flip-flop GA is set in the same manner as arethe other GA flip-fiops in cells 1 through M. However there is no GBinput from cell M+1 to a succeeding cell since cell M-t-l is therightmost cell in the array. Thus while control conductor GLY isconnected to one input of gate 554 there is no second input to this gatefrom a cell to the right of cell M+1. Conductor SEY is connected to theother input of gate 554. When conductor SEY is pulsed together withconductor GLY, flip-flop GA is set in the 1 state. By pulsing these twoconductors simultaneously the rightmost cell in the entire array may beactivated. Cell M+1 does require an OR gate equivalent to OR gate 1132on FIG. 11. Since signal P is extended to cell M+1 from cell M and thissignal can control the setting of flip-flop GB OR gate 532 is requiredin cell M+1. However a gate equivalent to gate 1152 or 552 is notrequired. These gates are used to develop P signals extended to adjacentcells on the right. Since there is no cell to the right of cell M+1 andno P signal need be developed, cell M-t-l does not include a gate suchas 552 or 1152. Cell M+1 does include an OR gate equivalent to OR gate1101. While in cell such an OR gate is not required since the 0 chainoriginates in cell 0. an O signal must be transmitted through cell M+1if it is developed in one of the preceding cells or if flip-flop GB isin the 1 state. For this reason OR gate 501 is provided. The final Ooutput conductor is extended from this OR gate to control 500 and asdescribed above when this conductor is energized the control is notifiedthat the required string of cells has been activated and that the signalpropagation has terminated.

FIGS. 2 and 3 are a symbolic perspective representa tion of the arrayand further clarify the organization of the illustrative embodiment ofthe invention. In this drawing. various groups of conductors are shownin planes. Y cells 0, 1, 2, 3, M and M+1 are shown. The connections tocell 3 are omitted in order that the organization of an individual cellbe clearly understood. The others of cells 1 through M are similarlyorganized but for the sake of clarity are shown as integral units.

The various conductors extended to the array from control 500 (FIG. 1)are shown entering the array at the left end of FIG. 2. The X controlcable is extended to every group of 24 X cells as shown. The Y controlcable is extended to all of the Y cells 0 through M-t-l. Controlconductor SEY is connected only to Y cells 0 and M+1.

The X data input conductors X X through X X are shown in a series ofplanes passing through respective groups of 24 X cells. Each of the tenconductor pairs in every plane is connected to 24 respective flip-flops.It will be noted that each plane passes through a Y cell as well as therespective group of 24 X cells since conductors X and X are extended toflip-flops Y through Y in each Y cell.

Conductors Fl through F24 are shown in a plane intersecting the controlportion of the X cells. Each F conductor is connected to the controlportion of a different X cell in each group of 24 and for this reasonthe plane representing the F conductors is in a different dimension thanthe plane representing the X data inputs.

In FIG. 5 and FIGS. 6ll the 30 conductor pairs Y T, through Y T and thesix conductors pairs X X through X X are contained in the same cable803. In FIGS. 2 and 3, however. the respective groups of conductor pairsare shown in different planes in the same dimension, for the purpose ofmore clearly illustrating their respective functions. The planecontaining conductor pairs X X through X X intersects each Y cell inonly that portion containing flip-flops Y and Y30. The

18 plane containing conductor pairs Y Y through Y3, T is shownintersecting the Y cells in that portion of each cell containingflip-flops Y1 through Y30.

The 30 output conductor pairs 0 6 through 0 6 originate in Y cell 1.These conductors pass through each Y cell in the portion of the cellcontaining flip-flops Y1 through Y30. For the sake of clarity, theoutput conductors are shown in the same plane as the 60 Y data inputconductors. When the plane enters Y cell 1, it contains only the 60 Ydata input conductors. When the plane leaves Y cell 1, it furthercontains the 60 output conductors. The 120 conductors in the plane enterand leave each of cells 2 through M1. The I20 conductors also enter Ycell M. When the plane leaves Y cell M, it contains only the 60 outputconductors since it is only these 60 conductors which are extended backto control 500.

The two CA conductors between X cell 1 in one group of cells and X cell24 in the adjacent group of cells to the right are also shown in thedrawing. Since these conductors enter and leave the control portions ofX cells 24 and 1, they are shown connected to the upper portions of theblock units.

The four individual conductors connecting adjacent Y cells are alsoshown in the drawing. The four individual conductors shown on FIG. 5connecting cell 0 to cell 1 are shown on FIG. 2. These conductors areconnected to the control portion of Y cell 1 as is evident from aninspection of FIG. 2. The other groups of four conductors each aresimilarly shown connecting the control portions of adjacent Y cells. Theconnections from cell M to cell M+1 shown in FIG. 3 are the same asthose shown in FIG. 5. The only output front cell M+l is conductor O Asin FIG. 5, this conductor, together with the 30 output conductor pairs 0U through 0 I3 is extended to control 500.

The two'dimensional array of cells described above. may be used inconjunction with a variety of control circuits. An illustrative controlcircuit (designated 500 in FIG. 5) is shown in FIG. t. The outputs fromthe control circuit match the inputs to the array as seen when FIG. 1 isplaced to the left of FIG. 2. The 61 inputs to the control circuit alsomatch the outputs of the array of cells.

The memory array of our invention is governed by a program control 100.The program control operates the various equipments on FIG. 1 inaccordance with a prescribed set of instructions and in accordance withthe output signals received from the 61 conductors O 6 through 0 6 andconductor O The signals on the X data input conductors are derived fromtwo registers 101 and 102. The program control applies ten bit signalsto the X input register 101. The signals are converted in the registerto ten complementary pairs. Each of 2G outputs of the register isconnected to one input of a respective one of the twenty gates 103422.The program control also applies ten bit signals to X mask register 102.Each of the ten output signals of the register is applied as one of theinputs to each of a pair of the gates 103-122. If a bit in the X maskregister is a 0 the two connected gates do not operate and neitherconductor in the respective pair of conductors X X through X X isenergized. Thus while the X input register 101 controls the signalsapplied to the X data input conductors, the ten-bit word stored in the Xmask register 102 determines the dont care" positions.

The X input register 101 also receives an additional six-bit signalsfrom control and includes an additional twelve bit positions which applysignals to respective inputs of gates 124435. Mask register 102 receivesan additional six bit signals from control 100 and includes anadditional six hit positions for controlling the application of signalsto respective pairs of gates 124-135.

19 These twelve gates are used to control the signals applied to thetwelve conductors X i through X X X command register 137 translatessignals received from control 100 and in turn governs the operation offield address decoder 138 and X sequence control 139. The field addressdecoder determines which of the conductors F through F are to beenergized. The X sequence control determines the sequence of theenergization of the X control conductors.

The Y data input signals are derived in a manner simi lar to that of theX data input signals. Program control 100 applies signals to both Yinput register 140 and Y mask register 141. The Y input registercontains 30 bit positions and the Y mask register contains 30 bitpositions. The signals are combined in 60 gates to derive the signalsY1, Y1 through Y3), T30.

Y command register 142 is analogous to X command register 137. The Ycommand register governs the operation of Y sequence control 143. Thisunit determines the sequence of the energization of the Y controlconductors,

that is, conductor SEY and the Y control conductors extended to cells 1through M.

There are no conductors equivalent to the F conductors in the Ydimension. However there is another type of control required in the Ydimension. The 61 readout signals from the array are derived from the Ycells and these signals must be extended to program control 100 as theyare required. The 60 signals 0 6 through 0 5 are extended to outputregister 144 together with signal O The signals are stored in the outputregister until Y sequence control 143 determines that they are requiredby program control 100. At this time Y sequence control 143 operatesread sequence control 145 to direct the 61 output signals, or selectedones of them, to pro gram control 100.

The invention has been described with reference to a specificembodiment. It must be understood that this embodiment is onlyillustrative of the application of the principles of the invention. Oneaspect of the invention is the control of certain data storage devicesindependently in different dimensions. These storage devices areflip-flops Y1 through Y24 in each Y cell in the illustrative embodiment.However other arrangements may be devised. For example, another level offlip-flops, e.g., X9 may be written into under the control of Ydimension commands along with flip-flops Y1 through Y24. Another aspectof the invention is the control of X cell operations in accordance withdata contained in the respective Y cell and the control of Y celloperations in accordance with the states of the X cells in therespective group. The illustrative embodiment of the inventionillustrates just one type of control for each direction. However heretoo other arrangements may be devised. For example, in some applicationsit may not be necessary to provide both types of control. If Y celloperations are to be completely independent of the states of the X cellsOR gate 930 and conductor 931 may be omitted from the circuitry.Similarly more complex types of control are possible. For example, Xcell operations may be controlled not only in accordance with the statesof flip-flops Y25 through Y30, but in addtion in accordance with thestates of flip-flops Y1 through Y24, and Y cell operations may becontrolled not only in accordance with the activity conditions of the Xcells in the respective group but in addition in accordance with datacontained in the X cell flip-flops. The techniques of our invention arenot limited to two-dimensional arrays. They may be applied tothree-dimensional and other multi-dimensional configurations. Thus it isto be understood that the embodiment described is only illustrative ofthe application of the principles of the invention and that variousmodifications may be made therein and other arrangements may be devisedwithout departing from the spirit and scope of the invention.

What is claimed is:

1. An associative memory comprising a plurality of first memory-logiccells arranged in a series configuration, a plurality of secondmemory-logic cells arranged in a series configuration, means forcoupling groups of said first memory-logic cells to respective ones ofsaid second memory-logic cells, means for applying control signals anddata signals to all of said first and second memory-logic cells, meansin said first and second memory-logic cells for comparing applied datasignals with data stored in said cells, means for registering a matchand a mismatch indication in said cells depending on the results of saidcomparison, means in each of said cells responsive to said controlsignals and said match-mismatch indicating means for indicating theactivity condition of said cell, means for retrieving data stored insaid second memory-logic cells, means for controlling logical operationsin each of said second memory-logic cells in accordance with applieddata and control signals and in accordance with the activity conditionsin the respective group of said first memorylogic cells, and means forcontrolling logical operations in each group of said first memory-logiccells in accordance with applied data and control signals and inaccordance with data stored in the respective one of said secondmemory-logic cells.

2. An associative memory in accordance with claim 1 further includingmeans coupling adjacent ones of said second memory-logic cells forpropagating signals between adjacent second cells in accordance withapplied signals and in accordance with data stored in said second cells,and means connected to each of said second memorylogic cells fordetecting the termination of signal propagation between adjacent ones ofsaid second cells.

3. An associative memory in accordance with claim 1 further includingmeans coupling adjacent ones of said first memory-logic cells forpropagating signals between adjacent first cells in accordance withapplied signals and in accordance with data stored in said first cells,and means connected to each group of said first memory-logic cells forcontrolling the propagation of signals from either end cell in the groupto the other end cell in the group in accordance with applied signalsand in accordance with data stored in said end cells.

4. An assocative memory in accordance with claim 1 further includingmeans in each group of said first memory-logic cells for governing theoperations of the respective first cell logical operation controllingmeans in a selected subgroup of said first cells in accordance withapplied data signals.

5. An associative memory in accordance with claim 1 wherein each of saidfirst and second cell logical operation controlling means includes meansresponsive to a match of data signals applied to the respective cellwith selected data stored in the same cell.

6. An associative memory in accordance with claim 5 further includingmeans in each of said first and second memory-logic cells responsive toa predetermined applied control signal for enabling the operation of therespective logical operation controlling means independent of a match ofsaid applied data signals with said selected data stored in the samecell.

7. An associative memory in accordance with claim 1 wherein each of saidfirst and second cell logical operation controlling means includes meansresponsive to a mismatch of data signals applied to the respective cellwith selected data stored in the same cell.

8. An associative memory in accordance with claim 7 further includingmeans in each of said first and second memory-logic cells responsive toa predetermined applied control signal for enabling the operation of therespective logical operation controlling means independent of a mismatchof said applied data signals with said selected data stored in the samecell.

9. An associative memory comprising a plurality of

